The Mini-3 ADSRs
The ADSRs are identical. When a gate voltage is applied to the input
the NPN transistor and the .001 capicitor form a LOW going trigger to the
556 trigger inputs. The timers go HIGH baised on the RC of the 1MEG sustain
pot and the 22MFD capicitor connected to PINS 1/2 or 12/13 of the 556 dual
timer. If the gate voltage goes low the PNP transistor connected to PINS 4/10
provides a reset for the timers.
The timers outputs are then applied to the sample and hold circuts made up
of the diodes, attack and decay pots, 10MFD caps and buffer op-amps. If the
gate voltage goes LOW the 10MFD cap is discharged throught the 1M release pot
and PNP transistor that makes up the release circut. Otherwise the attack is
set by charging the 10MFD cap throught the attack pot and decay is set by
waiting until the timer goes LOW then discharging the 10MFD cap throught the
decay pot.
Testing The ADSRs
Apply +- 12VDC to the curcit.
Set the attack and release pots to minimum, and the
decay and sustain to about 25 percent.
You should see the envelope on the monitor LEDs.
